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MUCF Cell Scheduling Algorithm for high speed network switches


Stanford Reference:

98-108


Abstract


This invention introduces a combined input-and-output queued switching for the application of high speed LAN switches, ATM switches and IP routers. This novel switch that addresses the delay of individual packets as well as increasing the throughput, is superior to existing combined switches that can improve the throughput and average delay, but not the delay of an individual packet. This switching can be used for any size switch or for any traffic arrival pattern. The improvement is achieved through maintaining the virtual output queues at each input. At the end of each cell time, a novel scheduling method is used to configure the non-blocking switch fabric. The switch fabric and memory run four times as fast as the external line rate to reduce the head-of-line blocking.

Applications


  • Telecommunication
  • Non-blocking switch
  • LAN switches
  • ATM switches
  • IP router

Advantages


  • Performs like a output queued with slower memory
  • Provides improvement in the delay of the individual packet

Publications


  • B. Prabhakar, N. McKeown, "On the speedup required forcombined input and output queued switching",Automatica, 35(12):1909-1920, 1999.

Related Web Links



Innovators & Portfolio



Patent Status



Date Released

 4/27/2009
 

Licensing Contact


Anne Kopf-Sill, Licensing Associate
(650)498-8015 (Business)
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Related Keywords


high speed data communications   networking hardware   communications: broadband   Switching   router   routing   communications: networking   networking   98-108   fiber optic network   fiber switches   communications   
 

   

  

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