A Filter Circuit with a Jammer Generator

This patented filtering circuit architecture is designed to suppress an FSK (frequency-shift-keying) modulated jammer for energy efficient narrow band wireless communications. Traditionally, analog intermediate frequency filters consume large amounts of current because they require a large dynamic range to maintain a large signal-to-noise ratio. This new architecture reduces power consumption by removing unwanted spectral components to lower the dynamic range of the analog to digital converter. This technology can be used in any wireless integrated circuit, especially for a jammer-to-signal ratio of more than 100.

Stage of Research
The inventors built a 0.32 mm² experimental circuit that suppressed FSK interferers in adjacent channels by more than 20 dB and dissipated 0.78 mW from a 1-V supply.