Optoelectronic Device Integration with Waveguides

Stanford researchers have patented a fabrication process for monolithic integration of different epitaxial materials on the same substrate for improved coupling of optoelectronic devices. Monolithic integration without bonding significantly reduces packaging cost and device size. The process also solves the problem of material mixing without degrading the performance of the final device. One embodiment of the invention uses silicon dioxide (SiO₂) as the thin, insulating layer between the waveguide and optoelectronic device. SiO₂ is compatible with silicon processing and certain methods of growth for germanium and silicon-germanium alloys, which simplifies device fabrication.

Miller Lab silicon photonics technology available for licensing includes:
“Ge-Si quantum well structures” U.S. Patent No. 7,599,593.
“Integration of optoelectronics with waveguides using interposer layer” U.S. Patent 8,824,837.
“Selective area growth of germanium and silicon-germanium in silicon waveguides for on-chip optical interconnect applications." U.S. Patent No. 9,368,579.
"Self-aligned semiconductor ridges in metallic slits as a platform for planar tunable nanoscale resonant photodetectors." U.S. Patent No. 8,829,633.
"Universal Linear Components." U.S. Patent Application No. 14/092,565.
"Field-Programmable Optical Component." U.S. Patent Application No. 15/080,170.
“Phase shifting by mechanical movement “ U.S. Patent Application No. 15/380,062 (Stanford docket 15-472)