Stanford researchers have patented a fabrication process for monolithic integration of different epitaxial materials on the same substrate for improved coupling of optoelectronic devices.
Stanford researchers patented a method to design, computationally optimize and fabricate efficient optical devices using semiconducting and dielectric nanostructures.
Researchers in Profs. Jonathan Fan and Jim Plummer's laboratory have patented a generalized, CMOS-compatible process to fabricate single crystal metal components on amorphous insulator substrates.
Stanford researchers have discovered a novel method of doping nanowires (NW) and thin films (TF) that greatly improves surface area and performance. The sol-flame method is a fast, simple and low cost way to introduce dopants into NW and TF for a wide variety of applications.
This invention is an efficient and very small high frequency inductor developed by Stanford researchers and made on an active substrate, such as silicon.
Engineers in Prof. H.-S. Philip Wong's laboratory have developed a lower power, three-dimensional resistive random access memory (RRAM) device using an atomically thin graphene edge electrode.
This patented technology is a scalable, reliable non-volatile memory device that uses graphene as a thermal barrier to improve energy efficiency and reliability of phase change material (PCM).
Stanford researchers at the Khuri-Yakub Lab have developed a new sensor topology that will enable high-resolution touch sensing and reliable authentication on portable electronics.
Stanford researchers have patented a crystalline germanium nanostructure device and method of forming a continuous polycrystalline Ge film (5-500nm thick poly-Ge) with crystalline Ge islands of preferred orientation.
Stanford University and Samsung researchers have patented a microfluidic-based platform that can rapidly fabricate and characterize Organic Thin Film Transistor (OTFT) arrays composed of solution-processable organic semiconducting polymers.
Stanford researchers developed a strong, flexible, high heat transfer architecture for electronics packaging interfacial material. The resins currently used in electronics packaging are a thermal management bottleneck.